Tuesday, 31 December 2013

South Bridge and North Bridge in Computer System

Southbridge

The Southbridge is an integrated circuit on the motherboard that is responsible for the hard drive controller, I/O controller and integrated hardware such as sound card, video card if present on the motherboard, USB, PCI, ISA, IDE, BIOS, and Ethernet. The southbridge gets its name for commonly being South of the PCI bus. Below is a graphic illustration of the ASUS P5AD2-E motherboard and some basic explanations of each of the major portions of the motherboard including the southbridge. As shown in the below picture, it's common for the northbridge and southbridge to have a heatsink; in addition, the northbridge is usually slightly larger than the southbridge

Although the southbridge handles a lot of the I/O devices, slower and less prominent input/output devices, such as the serial port, keyboard, and non-USB mouse are handled by the super input/output (SIO).

Northbridge 

The high-speed part of a common chipset architecture in a computer. The Northbridge is the controller that interconnects the CPU to memory via the frontside bus (FSB). It also connects peripherals via high-speed channels such as AGP and PCI Express. The Northbridge may include a display controller, obviating the need for a separate display adapter.

The Southbridge controller handles the remaining I/O, including the PCI bus, parallel and Serial ATA drives (IDE), USB, FireWire, serial and parallel ports and audio ports. Earlier chipsets supported the ISA bus in the Southbridge. Starting with Intel's 8xx chipsets, Northbridge and Southbridge were changed to Memory Controller and I/O Controller (see Intel Hub Architecture).
Northbridge Connects CPU to:
      RAM
      AGP bus
      PCI Express bus
      Built-in display Adapter
      Southbridge Connects CPU to:
      ATA (IDE) Drives
      USB bus
      FireWire bus
      Serial port
      Parallel port
      Built-in audio

      ISA bus (earlier PCs)
Northbridge/Southbridge Chipset
The Northbridge part of the chipset controls the high-speed channels, while the Southbridge controls the lower speed devices.

 

 

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